When analysts discuss China’s semiconductor ambitions, the conversation almost always centers on chip design — HiSilicon, Unisoc, Cambricon — or on front-end fabrication at SMIC. What gets far less attention is the backend: the packaging, assembly, and testing that transforms a raw wafer into a finished chip. Three companies — JCET Group, Tongfu Microelectronics, and Tianshui Huatian Technology — collectively handle a significant share of global packaging volume, and understanding them is essential for any professional navigating the modern electronics supply chain.
Why Backend Packaging Matters More Than People Think
Semiconductor packaging is not an afterthought. It determines whether a chip can operate reliably at speed, manage heat dissipation, interface with a printed circuit board, and fit the miniaturized form factors modern electronics demand. Advanced packaging technologies — flip-chip, fan-out wafer-level packaging (FOWLP), 2.5D interposers, and 3D chiplet stacking — have become as strategically important as node shrinks in the fab. TSMC, Intel, and ASE Group have each invested billions to lead here. China’s champions are closing the gap faster than most Western observers appreciate.
The backend segment is also, critically, less subject to the technology denial regime governing front-end equipment. ASML’s extreme ultraviolet lithography machines are blocked from export to China. But packaging equipment — wire bonders, encapsulant dispensers, test handlers — faces far fewer restrictions, giving Chinese OSAT (Outsourced Semiconductor Assembly and Test) firms more room to invest, scale, and innovate.
JCET Group: China’s Largest and the World’s Third Biggest OSAT
Jiangsu Changjiang Electronics Technology, universally known as JCET, is headquartered in Wuxi, Jiangsu Province, and listed on the Shanghai Stock Exchange. With revenues exceeding RMB 23 billion (approximately $3.2 billion) in fiscal 2024 and manufacturing operations across China, Singapore, and South Korea, JCET ranks as the world’s third-largest OSAT company by revenue, behind only Taiwan’s ASE Technology Holding and Amkor Technology of the United States.
The defining moment in JCET’s global ascent came in 2015 when it acquired Singapore’s STATS ChipPAC for approximately $780 million. The deal gave JCET immediate access to advanced flip-chip packaging technology, a global customer base including major American and European chip designers, and manufacturing capacity in Singapore — a jurisdiction viewed more neutrally by Western buyers than mainland China. The acquisition was financed in part by the National Integrated Circuit Industry Investment Fund (the “Big Fund”), underscoring Beijing’s strategic commitment to OSAT capabilities.
JCET’s product portfolio spans wire bonding, flip chip, wafer-level chip-scale packaging (WLCSP), and system-in-package (SiP) solutions. Its Wuxi and Nantong facilities serve customers across automotive, consumer electronics, communications infrastructure, and industrial sectors.
Tongfu Microelectronics: The AMD Partnership and the Advanced Packaging Push
Tongfu Microelectronics is headquartered in Nantong, Jiangsu Province, and listed on the Shenzhen Stock Exchange. Its revenue stood at approximately RMB 17 billion (around $2.4 billion) in 2024. What sets Tongfu apart is the depth of its relationship with Advanced Micro Devices (AMD). Tongfu is AMD’s primary packaging partner for EPYC server processors and Radeon GPUs through its Chengdu and Suzhou facilities — a relationship dating to AMD’s asset-light business model pivot in the early 2010s.
This partnership has given Tongfu something invaluable: hands-on experience with the most demanding packaging requirements in the industry. AMD’s EPYC chips use chiplet architecture — multiple dies assembled using AMD’s Infinity Fabric interconnect — which requires precise multi-die placement and advanced substrate technology. Tongfu has built engineering competencies in these processes that rival, for certain product categories, what ASE or Amkor offer. In recent years, the company has invested heavily in fan-out packaging and heterogeneous integration, the technologies that will define next-generation AI accelerators and high-performance computing chips.
Tianshui Huatian: Volume, Reliability, and the Automotive Bet
Tianshui Huatian Technology Group, based in Tianshui, Gansu Province in northwestern China, is listed on the Shenzhen Stock Exchange with revenues of approximately RMB 10 billion ($1.4 billion) in 2024. Huatian has built its competitive position on wire bonding volume, reliability engineering, and an aggressive push into automotive-grade semiconductor packaging.
Wire bonding remains the workhorse process for microcontrollers, analog ICs, power management chips, and sensor packages. Huatian operates wire bonding lines at a scale and efficiency that enables strong cost competitiveness for high-volume consumer and industrial applications. Its acquisition of manufacturing operations with presence in Malaysia and Penang gave it an international footprint that mitigates some customer concerns about geopolitical concentration.
The automotive angle is particularly noteworthy. As the global automotive industry transitions to EVs and ADAS systems, semiconductor content per vehicle has surged from roughly $400 in a conventional internal combustion engine car to over $1,000 in a premium EV. Automotive chips demand AEC-Q100 qualification, stringent reliability testing, and long product lifecycle support. Huatian has invested substantially in these capabilities, targeting Tier 1 automotive suppliers and chipmakers seeking to diversify packaging capacity away from Taiwan.
The Geopolitical Context: What US Export Controls Do and Don’t Restrict
The US Bureau of Industry and Security (BIS) tightened export controls on semiconductor equipment through rule updates in October 2022, October 2023, and August 2024. These controls primarily target front-end wafer fabrication equipment — lithography, etch, deposition, and inspection tools for chips below 14nm — and have materially slowed SMIC’s ability to produce cutting-edge logic chips.
Backend packaging equipment, however, remains largely outside the scope of these restrictions. Wire bonders, molding systems, test handlers, and many advanced packaging tools are not listed as controlled items. This creates a significant asymmetry: China’s ability to design and fabricate leading-edge chips is constrained, but its ability to package and test them — including chips fabricated at non-restricted nodes — is relatively unconstrained. For power semiconductors, analog ICs, microcontrollers, RF chips, and mature-node digital chips, the backend is not the bottleneck.
Companies assessing these tradeoffs should engage directly with the US Bureau of Industry and Security Export Administration Regulations and monitor updates from China’s Ministry of Industry and Information Technology (MIIT), which regularly publishes guidance on semiconductor industrial policy including packaging investment priorities.
Advanced Packaging: China’s Next Frontier
The most significant technology shift in semiconductors over the next decade will come from advanced packaging. As Moore’s Law slows, chipmakers are turning to heterogeneous integration: stacking multiple dies, combining logic and memory in a single package, and using silicon interposers to achieve bandwidth gains that lithographic scaling alone cannot deliver. NVIDIA’s H100 and H200 GPU packages, Intel’s Foveros 3D stacking, and AMD’s 3D V-Cache are the leading examples.
China is investing aggressively. The “Big Fund” second phase, established in 2019 with approximately RMB 200 billion in committed capital, explicitly targets advanced packaging alongside front-end equipment and materials. JCET, Tongfu, and Huatian have all received Big Fund investment, and institutions including the Institute of Microelectronics of the Chinese Academy of Sciences maintain active 2.5D and 3D packaging programs.
Supply Chain Implications for Foreign Businesses
For procurement and supply chain professionals at semiconductor companies, electronics manufacturers, and automotive OEMs, the rise of China’s OSAT sector presents concrete decisions. JCET, Tongfu, and Huatian are generally 15 to 30 percent cheaper than ASE or Amkor for standard wire-bond and flip-chip processes — savings that are material at high volume.
The right sourcing calculus depends heavily on end-market requirements. Defense and aerospace supply chains in the United States and Europe typically restrict Chinese-origin assembly from qualified supplier lists. Consumer electronics, industrial, and most commercial automotive supply chains impose no such restriction. Diversifying packaging capacity away from Taiwan is a legitimate risk-management strategy — one that Chinese OSATs are well-positioned to support.
For a complete picture of China’s semiconductor value chain, the HiSilicon, Unisoc, and Cambricon analysis covers the front-end design ecosystem, and the SMIC in 2026 deep-dive explains fabrication constraints in detail. For upstream materials dependencies, the rare earth export controls analysis and the advanced materials overview complete the picture.
The Bottom Line
JCET, Tongfu Microelectronics, and Tianshui Huatian are not household names outside the semiconductor industry. Together, they represent a backend packaging ecosystem of genuine global scale and growing technical sophistication. The standard narrative about China’s semiconductor deficit focuses on what it cannot do: manufacture 3nm logic, acquire EUV tools, build the most advanced memory chips. But for power, analog, RF, mature-node logic, and sensors — a large share of all chips produced globally — China’s OSAT industry is competitive, commercially significant, and deeply integrated into global supply chains. Professionals who understand the full semiconductor stack will make better sourcing and policy decisions than those focused exclusively on the fabrication headline. The U.S. Department of Commerce semiconductor supply chain resources detail the policy and compliance landscape shaping how American companies engage with Chinese packaging and assembly partners.